- Mandal, Ayan
- Khatri, Sunil P
- Mahapatra, Rabi
Source-Synchronous Networks-On-Chip
- Circuit and Architectural Interconnect Modeling
- Gebunden,
- 2014,
- Springer, Berlin
- (2013)
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This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. It provides circuit-level details of the NoC and includes architectural simulations of the NoC.
Introduction.- Clock Distribution for fast Networks-on-Chip.- Fast Network-on-Chip Design.- Fast On-Chip Data transfer using Sinusoid Signals.- Conclusion and Future Work.
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DETAILS
- Source-Synchronous Networks-On-Chip
- Circuit and Architectural Interconnect Modeling
- Mandal, Ayan, Khatri, Sunil P, Mahapatra, Rabi
- Gebunden, xiii, 143 S.
- XIII, 143 p. 95 illus., 10 illus. in color.
- Sprache: Englisch
- 235 mm
- ISBN-13: 978-1-4614-9404-1
- Titelnr.: 42119280
- Gewicht: 356 g
- Springer, Berlin (2013)
Herstelleradresse
Springer Heidelberg
Tiergartenstr. 17
69121 - DE Heidelberg
E-Mail: buchhandel-buch@springer.com
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